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hexfet ? power mosfet fifth generation hexfet ? power mosfets from international rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that hexfet power mosfets are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. the d 2 pak is a surface mount power package capable of accommodating die sizes up to hex-4. it provides the highest power capability and the lowest possible on- resistance in any existing surface mount package. the d 2 pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0w in a typical surface mount application. the through-hole version (irl1004l) is available for low- profile application. s d g v dss = 40v r ds(on) = 0.0065 ? i d = 130a advanced process technology ultra low on-resistance dynamic dv/dt rating 175c operating temperature fast switching fully avalanche rated lead-free description 07/19/04 www.irf.com 1

d 2 pak irl1004s to-262 irl1004l parameter typ. max. units r jc junction-to-case ??? 0.75 r ja junction-to-ambient ( pcb mounted,steady-state)* ??? 40 thermal resistance c/w parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 130 i d @ t c = 100c continuous drain current, v gs @ 10v 92 a i dm pulsed drain current 520 p d @t a = 25c power dissipation 3.8 w p d @t c = 25c power dissipation 200 w linear derating factor 1.3 w/c v gs gate-to-source voltage 16 v e as single pulse avalanche energy 700 mj i ar avalanche current 78 a e ar repetitive avalanche energy 20 mj dv/dt peak diode recovery dv/dt 5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case) c absolute maximum ratings logic-level gate drive

2 www.irf.com repetitive rating; pulse width limited by max. junction temperature. (see fig. 11) i sd 78a, di/dt 370a/s, v dd v (br)dss , t j 175c starting t j = 25c, l = 0.23mh r g = 25 ? , i as = 78a. (see figure 12) pulse width 300s; duty cycle 2%. s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source current integral reverse (body diode) ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.3 v t j = 25c, i s = 78a, v gs = 0v t rr reverse recovery time ??? 78 120 ns t j = 25c, i f = 78a q rr reverse recoverycharge ??? 180 270 nc di/dt = 100a/s t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) 130 520 calculated continuous current based on maximum allowable junction temperature; for recommended current-handing of the package refer to design tip # 93-4 when mounted on 1" square pcb ( fr-4 or g-10 material ). for recommended footprint and soldering techniques refer to application note #an-994. uses irl1004 data and test conditions source-drain ratings and characteristics parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 40 ??? ??? v v gs = 0v, i d = 250 a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.04 ??? v c reference to 25 c, i d = 1ma 0.0065 v gs = 10v, i d = 78a 0.009 ? v gs = 4.5v, i d = 65a v gs(th) gate threshold voltage 1.0 ??? v v ds = v gs , i d = 250 a g fs forward transconductance 63 sv ds = 25v, i d = 78a 25 v ds = 40v, v gs = 0v ??? ??? 250 v ds = 32v, v gs = 0v, t j = 150c gate-to-source forward leakage ??? ??? 100 v gs = 16v gate-to-source reverse leakage ??? ??? -100 na v gs = -16v q g total gate charge ??? ??? 100 i d = 78a q gs gate-to-source charge ??? ??? 32 nc v ds = 32v q gd gate-to-drain ("miller") charge ??? ??? 43 v gs = 4.5v, see fig. 6 and 13 t d(on) turn-on delay time ??? 16 ??? v dd = 20v, t r rise time ??? 210 ??? i d = 78a, t d(off) turn-off delay time ??? 25 ??? ns r g = 2.5 ?, t f fall time ??? 14 ??? r d = 0.18 ? , see fig. 10 between lead, ??? ??? and center of die contact c iss input capacitance ??? 5330 ??? v gs = 0v c oss output capacitance ??? 1480 ??? pf v ds = 25v c rss reverse transfer capacitance ??? 320 ??? ? = 1.0mhz, see fig. 5 electrical characteristics @ t j = 25c (unless otherwise specified) r ds(on) static drain-to-source on-resistance i dss drain-to-source leakage current

www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 1000 10000 0.1 1 10 100 20s pulse width t = 25 c j top bottom vgs 15v 10v 7.0v 5.5v 4.5v 4.0v 3.5v 2.7v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 2.7v 1 10 100 1000 0.1 1 10 100 20s pulse width t = 175 c j top bottom vgs 15v 10v 7.0v 5.5v 4.5v 4.0v 3.5v 2.7v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 2.7v 0.1 1 10 100 1000 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 v = 50v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 175 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 130a

4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 0 2000 4000 6000 8000 10000 v , drain-to-source voltage (v) c, capacitance (pf) ds v c c c = = = = 0v, c c c f = 1mhz + c + c c shorted gs iss gs gd , ds rss gd oss ds gd c iss c oss c rss 0 30 60 90 120 150 180 0 2 4 6 8 10 12 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 78 a v = 20v ds v = 32v ds 0.1 1 10 100 1000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 175 c j 1 10 100 1000 10000 1 10 100 operation in this area limited by r ds(on) single pulse t t = 175 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms

www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 10a. switching time test circuit v ds 9 0% 1 0% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms
1 0.1 % + - 25 50 75 100 125 150 175 0 20 40 60 80 100 120 140 t , case temperature ( c) i , drain current (a) c d limited by package 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)

6 www.irf.com d.u.t. v d s i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 13b. gate charge test circuit fig 12c. maximum avalanche energy vs. drain current 25 50 75 100 125 150 175 0 300 600 900 1200 1500 1800 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 32a 55a 78a fig 12a. unclamped inductive test circuit fig 12b. unclamped inductive waveforms v ds l d.u.t. v d d i as t p 0.01 ? r g + - t p v ds i as v dd v (br)dss 4.5 v q g q gs q gd v g charge fig 13a. basic gate charge waveform 4.5 v

www.irf.com 7 p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop r e-applied v oltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfet ? power mosfets ! "# $$#%
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8 www.irf.com dimensions are shown in millimeters (inches) note: "p" in ass embly line position indicates "lead-free" f530s t his is an ir f 530s wit h lot code 8024 as s e mbled on ww 02, 2000 in the ass embly line "l" as s e mb l y lot code int e rnat ional rectifier logo part numb er dat e code ye ar 0 = 2000 we e k 02 line l f 530s a = assembly site code we e k 02 p = de s ignat e s l e ad-f r e e product (optional) rectifier int ernat ional logo lot code as s e mb l y year 0 = 2000 dat e code part number

www.irf.com 9 to-262 part marking information to-262 package outline dimensions are shown in millimeters (inches) as s e mb l y lot code rectifier int ernational assembled on ww 19, 1997 note: "p" in as s embly line pos iti on indicates "l ead-f ree" in t he as s e mb ly l ine "c" logo this is an irl3103l lot code 1789 example: line c dat e code we e k 1 9 ye ar 7 = 1997 part number part number logo lot code as s e mb l y int ernat ional rectifier product (opt ional) p = designates lead-free a = assembly site code we e k 1 9 ye ar 7 = 1997 dat e code or

10 www.irf.com dimensions are shown in millimeters (inches) 3 4 4 trr f eed direction 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) trl f eed direction 10.90 (.429) 10.70 (.421) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957 ) 23.90 (.941 ) 0.368 (.0145) 0.342 (.0135) 1.60 (.063) 1.50 (.059) 13.50 (.532) 12.80 (.504) 330.00 (14.173) max. 27.40 (1.079) 23.90 (.941) 60.00 (2.362 ) min. 30.40 (1.197) max. 26.40 (1.039) 24.40 (.961) notes : 1. comforms to eia-418. 2. controlling dimension: millimeter. 3. dimension measured @ hub. 4. includes flange distortion @ outer edge. data and specifications subject to change without notice. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 07/04
note: for the most current drawings please refer to the ir website at: http://www.irf.com/package/

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